(China (Mainland))
Product Summary
The Si5326 is a jitter-attenuating precision clock multiplier for applications
requiring sub 1 ps jitter performance. The Si5326 accepts two input clocks ranging
from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to
945 MHz and select frequencies to 1.4 GHz. The two outputs are divided down
separately from a common source. The Si5326 can also use its crystal oscillator
as a clock source for frequency synthesis. The device provides virtually any
frequency translation combination across this operating range. The Si5326 input
clock frequency and clock multiplication ratio are programmable through an I2C or
SPI interface. The Si5326 is based on Silicon Laboratories' 3rd-generation
DSPLL? technology, which provides frequency synthesis and jitter attenuation in a
highly integrated PLL solution that eliminates the need for external VCXO and
loop filter components. The DSPLL loop bandwidth is digitally programmable,
providing jitter performance optimization at the application level. Operating from a
single 1.8, 2.5, or 3.3 V supply, the Si5326 is ideal for providing clock
multiplication and jitter attenuation in high performance timing applications.
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
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 Si5326A-C-GM |
Silicon Labs |
Clock Synthesizer / Jitter Cleaner ANY-RATE CLK MULT JITTER ATTEN 2 OUTS |
Data Sheet |
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SI5326A-C-GMR |
Silicon Labs |
Clock Synthesizer / Jitter Cleaner Precision Clk Xplier Jitter Attn 2In/Out |
Data Sheet |
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