Product Summary
The X28HC64P-12 is a byte alterable EEPROM. Addresses (A0-A12): The Address inputs select an 8-bit memory location during a read or write operation. Chip Enable (CE): The X28HC64P-12 Enable input must be LOW to enable all read/write operations. When CE is HIGH, power consumption is reduced. Output Enable (OE): The X28HC64P-12 Enable input controls the data output buffers and is used to initiate read operations. Data In/Data Out (I/O0-I/O7): Data is written to or read from the X28HC64P-12 through the I/O pins. Write Enable (WE): The Write Enable input controls the writing of data to the X28HC64P-12.
Parametrics
X28HC64P-12 absolute maximum ratings: (1)Temperature Under Bias X28HC64: -10°C to +85°C, X28HC64I: -65°C to +135°C; (2)Storage Temperature: -65°C to +150°C; (3)Voltage on any Pin with Respect to Vss: -1V to +7V; (4)DC Output Current: 5mA.
Features
X28HC64P-12 features: (1)Low power CMOS: 40mA active current max; (2)200μA standby current max; (3)Fast write cycle times: 64-byte page write operation, Byte or page write cycle: 2ms typical, Complete memory rewrite: 0.25 sec. typical, Effective byte write cycle time: 32μs typical; (4)Software data protection; (5)End of write detection: DATA polling, Toggle bit; (6)High reliability: Endurance: 100000 cycles, Data retention: 100 years; (7)JEDEC approved byte-wide pin out; (8)Pb-free available (RoHS compliant).
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||
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X28HC64P-12 |
IC EEPROM 64KBIT 120NS 28DIP |
Data Sheet |
Negotiable |
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Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||
X28HC |
Other |
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Negotiable |
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X28HC256 |
Other |
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Negotiable |
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X28HC256J-12 |
Intersil |
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Data Sheet |
Negotiable |
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X28HC256J-12T1 |
Intersil |
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Data Sheet |
Negotiable |
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X28HC256J-15 |
Intersil |
IC EEPROM 32K X 8 32PLCC |
Data Sheet |
Negotiable |
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X28HC256J-15T1 |
Intersil |
IC EEPROM 32KX8 5V CMOS 32-PLCC |
Data Sheet |
Negotiable |
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