(China (Mainland))
Product Summary
The EM639165TS-6G SDRAM is a high-speed CMOS synchronous DRAM containing 128 Mbits. It is internally configured as 4 Banks of 2M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the EM639165TS-6G is burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The EM639165TS-6G provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use.
Parametrics
EM639165TS-6G absolute maximum ratings: (1)Input, Output Voltage, VIN, VOUT: -1.0 to 4.6V; (2)Power Supply Voltage, VDD, VDDQ: -1.0 to 4.6V; (3)Operating Temperature, TA: 0 to 70℃; (4)Storage Temperature, TSTG: -55 to 125℃; (5)Soldering Temperature (10 second), TSOLDER: 260℃; (6)Power Dissipation, PD: 1W; (7)Short Circuit Output Current, IOUT: 50mA.
Features
EM639165TS-6G features: (1)Fast access time from clock: 5/5.4 ns; (2)Fast clock rate: 166/143 MHz; (3)Fully synchronous operation; (4)Internal pipelined architecture; (5)2M word x 16-bit x 4-bank; (6)Programmable Mode registers: CAS# Latency: 2, or 3; Burst Length: 1, 2, 4, 8, or full page; Burst Type: interleaved or linear burst; Burst stop function; (7)Auto Refresh and Self Refresh; (8)4096 refresh cycles/64ms; (9)CKE power down mode; (10)Single +3.3V power supply; (11)Interface: LVTTL; (12)54-pin 400 mil plastic TSOP II package; (13)Lead-free package is available.
Diagrams
<IMG alt="EM639165TS-6G block diagram" src="http://www.seekic.com/uploadfile/ic-mfg/201283221052222.jpg" border=0>
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