Product Summary
The IS41C16100-50T is a high-performance CMOS Dynamic Random Access Memorie. The IS41C16100-50T offers an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the The IS41C16100-50T ideal for use in 16-bit and 32-bit wide data bus systems. These features make the The IS41C16100-50T ideally suited for high-bandwidth graphics, digital signal processing, highperformance computing systems, and peripheral applications. The IS41C16100 and IS41LV16100 are packaged in a 42-pin 400-mil SOJ and 400-mil 50- (44-) pin TSOP (Type II). The lead-free 400-mil 50- (44-) option is available too.
Parametrics
IS41C16100-50T absolute maximum ratings: (1) VT Voltage on Any Pin Relative to GND: 5V, –1.0 to +7.0 V,; (2)3.3V, –0.5 to +4.6; (3) VCC Supply Voltage: 5V, –1.0 to +7.0 V, 3.3V, –0.5 to +4.6; (4) IOUT Output Current: 50 mA; (5) PD Power Dissipation: 1 W; (6) TA Commercial Operation Temperature: 0 to +70 °C; (7) Industrial Operationg Temperature: -40 to +85 °C; (8) TSTG Storage Temperature: –55 to +125 °C.
Features
IS41C16100-50T features: (1) TTL compatible inputs and outputs; tristate I/O; (2) Refresh Interval:Auto refresh Mode: 1,024 cycles /16 ms, RAS-Only, CAS-before-RAS (CBR), and Hidden, Self refresh Mode - 1,024 cycles / 128ms; (3) JEDEC standard pinout; (4) Single power supply: 5V ±10% (IS41C16100), 3.3V ±10% (IS41LV16100); (5) Byte Write and Byte Read operation via two CAS; (6) Industrail Temperature Range -40°C to 85°C.
Diagrams
IS41C16100 |
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Negotiable |
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IS41C16100S |
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Negotiable |
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IS41C16105 |
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Negotiable |
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IS41C16128 |
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Negotiable |
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IS41C16256 |
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Negotiable |
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IS41C16256C-35TLI |
ISSI |
DRAM 4M, 5V, EDO DRAM 35ns, 40 pin TSOP II |
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